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In this tutorial, we demonstrate how to use continuous assignment statements in Verilog to construct digital logic circuits on an FPGA. A field-programmable gate array (FPGA) is an integrated circuit (IC) that lets you implement custom digital circuits. You can use an FPGA to create optimized digital logic for things like digital signal processing (DSP), machine learning, and cryptocurrency mining. Because of the FPGA’s flexibility, you can often implement entire processors using its digital logic. You can find FPGAs in consumer electronics, satellites, and in servers used to perform specialized calculations. In this series, we will see how an FPGA works and demonstrate how to create custom digital logic using the Verilog hardware description language (HDL). Previously, we showed how to install apio and the open-source toolchain required to work with Lattice iCE40 FPGAs (https://www.youtube.com/watch?v=gtkQ84Euyww%29. In this episode, we demonstrate how to write simple continuous assignment statements in Verilog to create digital logic circuits. Wikipedia article on adders: https://en.wikipedia.org/wiki/Adder_(electronics) The solution to the challenge at the end of the episode can be found here: https://www.digikey.com/en/maker/projects/introduction-to-fpga-part-3-getting-started-with-verilog/9d9dbff29a4b45728521b2664bbd1df4 All code examples and solutions for this series can be found here: https://github.com/ShawnHymel/introduction-to-fpga We start by showing how to define pins using a physical constraints file (.pcf), which maps Verilog I/O signal names to physical pin numbers on the FPGA package. Refer to the following documents to see the pinout on the iCE40HX1K and how it’s connected on the iCEstick: - iCE40 LP/HX Datasheet - iCEstick Evaluation Kit User’s Guide From there, we show how lookup tables are used to construct digital circuits inside the FPGA. We design a very simple digital circuit (a simple AND gate with pushbutton inputs) in Verilog, synthesize it, and upload it to the iCEstick. Next, we demonstrate how vectors work in Verilog (as a bus of wires) and how to branch wires using the replication operation. Verilog Quick Reference Card: http://www.ee.ic.ac.uk/pcheung/teaching/ee2_digital/Verilog%20Quick%20Reference%20Card%20v2_0.pdf Your challenge is to create a 1-bit full adder as shown in this Wikipedia article. Product Links: https://www.digikey.com/en/products/detail/lattice-semiconductor-corporation/ICE40HX1K-STICK-EVN/4289604 Related Videos: https://www.youtube.com/watch?v=z8Oldd-nrfs https://www.youtube.com/watch?v=5kNXX67mchE https://www.youtube.com/watch?v=iwcxLQ6AB88 Related Project Links: https://www.digikey.com/en/maker/projects/introduction-to-fpga-part-3-getting-started-with-verilog/9d9dbff29a4b45728521b2664bbd1df4 Related Articles: https://www.digikey.com/en/pdf/r/renesas-electronics-america/powering-fpga-applications https://www.digikey.com/en/videos/d/dsp/edge-machine-deep-learning-on-fpga Learn more: Maker.io - https://www.digikey.com/en/maker Digi-Key’s Blog – TheCircuit https://www.digikey.com/en/blog Connect with Digi-Key on Facebook https://www.facebook.com/unsupportedbrowser And follow us on Twitter https://twitter.com/digikey